Wednesday, June 9, 2021

Latches, Flip-Flop and Pewaktu (Timer) x

 

Latches 


Definition 

The output of a latch depends on its current inputs and on its previous output and its change of state can happen at any time when its inputs change Program Studi T. Elektro FT - UHAMKA Slide - 8 2 The output of a latch depends on its current inputs and on its previous output and its change of state can happen at any time when its inputs change 
1.S-R (Set-Reset) Latch 
2. Gated S-R Latch 
3. Gated D Latch

S-R Latch




Negative-OR Equivalent of the NAND gate /S-/R Latch

Example: Determine the waveform that will be observed on the Q output. Assume that Q is initially LOW

The Gated S-R Latch A gated latch requires an Enable input, EN (G is also used to designated an enable input). The S and R inputs control the state to which the latch will go when a HIGH level is applied to the EN input. The latch will not change until EN is HIGH.

Truth Table for Gated S-R Latch

The Gated D Latch Only has one input in addition to EN. This input is called the D (data) input. -When the D input is HIGH and the EN input is HIGH, the latch will SET. -When the D input is LOW and EN is HIGH, the latch will RESET. -Another way, the output Q follows the input D when EN is HIGH



Edge-Triggered Flip-Flops 
1. Edge-triggered S-R flip-flop 
2. Edge-triggered D flip-flop 
3.Edge-triggered J-K flip-flop

Edge-Triggered Flip-Flop Logic Symbols (Top: Positive Edge-Triggered; Bottom: Negative Edge-Triggered).

The Edge-Triggered S-R Flip-Flop The S and R inputs of the S-R flip-flop are called synchronous input because data on these inputs are transferred to the flip-flop’s output only on the triggering edge of the clock pulse.

 Operation of a positive edge-triggered S-R flip-flop



Example: Determine the Q and /Q output waveforms of the flip-flop (Assume is initially RESET)



Exercise: Determine the Q and /Q output waveforms of the flip-flop (Assume is initially RESET) and it is a negative edge-triggered device


The Edge-Triggered D FlipFlop The D flip-flop is useful when a single data bit (1 or 0) is to be stored


Example: Determine the Q output waveform if the flip-flop starts out RESET




Try This: Determine the Q output for the D flip-flop if the D input is inverted

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Jawaban Uas Rafi Fadhlur Rahman (2003015221)

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